1 ? hs-303arh radiation hardened cmos dual spdt analog switch the hs-303arh analog switch is a monolithic device fabricated using intersil?s diel ectrically isolated radiation hardened silicon gate (rsg) process technology to insure latch-up free operation. it is pinout compatible and functionally equivalent to the hs-303rh, but offers improved 300krad(si) total dose capability. this switch offers low- resistance switching performance for analog voltages up to the supply rails. ?on? resistance is low and stays reasonably constant over the full range of operating voltage and current. ?on? resistance also stays reasonably constant when exposed to radiation, being typically 29 pre-rad and 34 post-300krad(si). break-bef ore-make switching is controlled by 5v digital inputs. specifications specifications for rad hard qm l devices are controlled by the defense supply center in columbus (dscc). the smd numbers listed below must be used when ordering. detailed electrical specificat ions for the hs-303arh are contained in smd 5962-95813. a ?hot-link? is provided from our website for downloading features ? qml, per mil-prf-38535 ? radiation performance - total dose: 3 x 10 5 rad(si) - see: for let = 60mev-mg/cm 2 at 60 incident angle, <150pc charge transferred to the output of an off switch ? no latch-up, dielectrically isolated device islands ? pinout and functionally compatible with intersil hs-303rh and hi-303 series analog switches ? analog signal range 15v ? low leakage . . . . . . . . . . . . . . . . 100na (max, post-rad) ?low r on . . . . . . . . . . . . . . . . . . . . . . 60 (max, post-rad) ? low standby supply current . . . . . . . . . . +150 a/-100 a (max, post-rad) pinouts hs1-303arh (sbdip), cdip2-t14 top view hs9-303arh (flatpack) cdfp3-f14 top view ordering information ordering number part number temp. range (c) pkg. pkg. dwg. # 5962f9581304qcc hs1-303arh-8 -55 to +125 14 ld sbdip d14.3 5962f9581304qxc hs9-303arh-8 -55 to +125 14 ld flatpack k14.a 5962f9581304v9a hs0-303arh-q -55 to +125 5962f9581304vcc hs1-303arh-q -55 to +125 14 ld sbdip d14.3 5962f9581304vxc hs9-303arh-q -55 to +125 14 ld flatpack k14.a hs0-303arh/proto hs0-303arh/sample -55 to +125 hs1-303arh/proto hs1-303arh/proto -55 to +125 14 ld sbdip d14.3 hs9-303arh/proto hs9-303arh/proto -55 to +125 14 ld flatpack k14.a nc gnd v+ v- 1 2 3 4 5 6 7 14 13 12 11 10 9 8 in1 s3 d3 d1 s4 d4 d2 in2 s2 s1 nc gnd in1 s3 d3 d1 s1 v+ v- s4 d4 d2 in2 s2 14 13 12 11 10 9 8 2 3 4 5 6 7 1 data sheet december 14, 2006 fn6411.0 caution: these devices are sensitive to electrosta tic discharge; follow proper ic handling procedures. 1-888-intersil or 1-888-468-3774 | intersil (and design) is a registered trademark of intersil americas inc. copyright intersil americas inc. 2006. all rights reserved all other trademarks mentioned are the property of their respective owners.
2 all intersil u.s. products are manufactured, asse mbled and tested utilizing iso9000 quality systems. intersil corporation?s quality certifications ca n be viewed at www.intersil.com/design/quality intersil products are sold by description only. intersil corpor ation reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnishe d by intersil is believed to be accurate and reliable. however, no responsibility is assumed by intersil or its subsidiaries for its use; nor for any infringements of paten ts or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiari es. for information regarding intersil corporation and its products, see www.intersil.com fn6411.0 december 14, 2006 functional diagram die characteristics die dimensions: 2690 m x 5200 m (106 mils x 205 mils) thickness: 483 m 25.4 m (19 mils 1 mil) interface materials: glassivation: type: psg (phosphorous silicon glass) thickness: 8.0k? 1.0k? top metallization: type: alsicu thickness: 16.0k? 2k? substrate: radiation hardened silicon gate, dielectric isolation backside finish: silicon assembly related information: substrate potential: unbiased (di) additional information: worst case current density: <2.0 x 10 5 a/cm 2 transistor count: 196 metallization mask layout hs-303arh n p in d sbdip truth table logic sw1 and sw2 sw3 and sw4 0offon 1onoff d3 d1 s1 in1 gnd v- d4 d2 s2 in2 s3 v+ s4 hs-303arh
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